vishay siliconix SIP32458, sip32459 document number: 63999 s12-2709-rev. a, 12-nov-12 www.vishay.com 1 this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 for technical questions, contact: powerictechsupport@vishay.com 20 m ? , slew rate controlled load switch in wcsp6 description SIP32458 and sip32459 are slew rate controlled integrated high side load switches that operate in the input voltage range from 1.5 v to 5.5 v. SIP32458 and sip32459 are of p-channel mosfet switching element with integr ated gate pump that provides 20 m ? switch on resistance over a wide input voltage range. these devices have low voltage logic control threshold that can interface with low voltage control i/o directly without extra level shift or driver. a 2.8 m ? pull-down resistor is integrated at logic control en pin. the slow slew rate of SIP32458 and sip32459 in the range of 3 ms limits the in-rush current and minimized the switching noise. the SIP32458 features a reverse current blocking capability while the sip32459 features an integrated output discharge switch. both SIP32458 and sip32459 are available in compact wafer level wcsp package, wcsp6 1 mm x 1.5 mm with 0.5 mm pitch. features ? low input voltage, 1.5 v to 5.5 v ? low r on , 20 m ? typical at 5 v ? slew rate control ? low logic control ? reverse current blocking when disabled (SIP32458, without outpu t discharge switch) ? integrated output discharge switch (sip32459 only) ? integrated pull down resistor at en pin ? 6 bumps wcsp package ? material categorization: for definitions of compliance please see www.vishay.com/doc?9991 applications ? battery operated devices ? smart phones ? gps and pmp ? computer ? medical and healthcare equipment ? industrial and instrument ? cellular phones and portable media players ? game console typical application circuit figure 1 - SIP32458 and sip32459 typical application circuit sip3245 8 , sip32459 i n i n v out out out v i n g n d g n d g n d e n e n c i n c out
www.vishay.com 2 document number: 63999 s12-2709-rev. a, 12-nov-12 vishay siliconix SIP32458, sip32459 this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 for technical questions, contact: powerictechsupport@vishay.com note: ge1 denotes halogen-free and rohs compliant notes: a. device mounted with all bumps soldered to pc board. b. derate 9.1 mw/c above t a = 70 c. stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other condit ions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating/conditions for extended periods may affect device reliability. ordering information temperature range package marking part number - 40 c to 85 c wcsp: 6 bumps (2 x 3, 0.5 mm pitch, 250 m bump height, 1.5 mm x 1 mm die size) aa SIP32458db-t2-ge1 ab sip32459db-t2-ge1 absolute maximum ratings parameter limit unit supply input voltage (v in ) - 0.3 to 6 v enable input voltage (v en ) - 0.3 to 6 output voltage (v out ) - 0.3 to 6 maximum continuous switch current (i max. )3 a maximum pulsed current (i dm ) v in (pulsed at 1 ms, 10 % duty cycle) 6 esd rating (hbm) 4000 v junction temperature (t j ) - 40 to 150 c thermal resistance ( ? ja ) a 110 c/w power dissipation (p d ) a 500 mw recommended operating range parameter limit unit input voltage range (v in ) 1.5 to 5.5 v operating junction temperature range - 40 to 125 c
document number: 63999 s12-2709-rev. a, 12-nov-12 www.vishay.com 3 vishay siliconix SIP32458, sip32459 this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 for technical questions, contact: powerictechsupport@vishay.com notes: a. the algebraic convention whereby the most negative value is a minimu m and the most positive a maximum. b. typical values are for design aid only, not guaranteed nor subject to production testing. c. for v in outside this range consult ty pical en threshold curve. pin configuration specifications parameter symbol test conditions unless specified v in = 1.5 v to 5.5 v, t a = - 40 c to 85 c (typical values are at v in = 4.5 v, t a = 25 c) limits unit min. a typ. b max. a operating voltage c v in 1.5 - 5.5 v quiescent current i q v en = v in , out = open -4.29.5 a off supply current i q(off) SIP32458 en = gnd, out = open --1 sip32459 - - 10 off switch current i ds(off) en = gnd, out = 0 v - - 10 reverse blocking current i rb v out = 2.5 v, v in = 0.75 v, v en = 0 v (SIP32458 only) --10 on-resistance r ds(on) v in = 1.5 v, i l = 500 ma, t a = 25 c -3036 m ? v in = 1.8 v, i l = 500 ma, t a = 25 c -2632 v in = 3.3 v, i l = 500 ma, t a = 25 c -2026 v in = 5 v, i l = 1 a, t a = 25 c -2026 on-resistance temp.-coefficient tc rds -2820-ppm/c output pulldown resistance r pd v in = 3.3 v, i out = 5 ma, v en = 0 v (sip32459 only) -70- ? en input low voltage c v il v in = 1.5 v --0.4 v en input high voltage c v ih v in = 5.5 v 1- - en input leakage i en v in = 5.5 v, v en = 0 v --1 a v in = 5.5 v, v en = 1.2 v -0.441 en pull down resistor r en v in = 5.5 v, v en = 1.2 v -2.8-m ? output turn-on delay time t d(on) v in = 4.5 v, r load = 5 ? , c l = 100 f, t a = 25 c -0.5- ms output turn-on rise time t r -3- output turn-off delay time t d(off) -18-s figure 2 - wcsp 2 x 3 package pin description pin number name function a1, b1 out these are the output pins of the switch c1 gnd ground connection a2, b2 in these are input pins of the switch c2 en enable input w aa 12 out in out in gnd en in in en a b c out out gnd a1 a2 b1 b2 c1 c2 backside bumpside
www.vishay.com 4 document number: 63999 s12-2709-rev. a, 12-nov-12 vishay siliconix SIP32458, sip32459 this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 for technical questions, contact: powerictechsupport@vishay.com block diagram typical characteristics (internally regulated, 25 c, unless otherwise noted) figure 3 - functional block diagram figure 4 - quiescent current vs. input voltage figure 5 - off supply current vs. input voltage 0 1 2 3 4 5 6 7 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 i q - quiescent current (a) v in - input voltage (v) 0 2 4 6 8 10 12 14 16 18 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 i q(off) - off supply current (na) v in - inport voltage (v) SIP32458 figure 6 - quiescent current s. temperature figure 7 - off supply current s. temperature 0 1 2 3 4 5 6 7 - 40 - 20 0 20 40 60 80 100 i q - quiescent current (a) temperature ( c) v in = 5.5 v v in = 3.6 v v in = 1.2 v v in = 2.5 v v in = 4.5 v 0.001 0.01 0.1 1 10 100 1000 - 40 - 20 0 20 40 60 80 100 i iq(off) - off supply current (na) temperature ( c) v in = 1.2 v v in = 3.6 v v in = 5.5 v v in = 4.5 v v in = 2.5 v SIP32458
document number: 63999 s12-2709-rev. a, 12-nov-12 www.vishay.com 5 vishay siliconix SIP32458, sip32459 this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 for technical questions, contact: powerictechsupport@vishay.com typical characteristics (internally regulated, 25 c, unless otherwise noted) figure 8 - off supply current vs. input voltage figure 9 - off switch current vs. input voltage figure 10 - r ds(on) vs. input voltage 0 100 200 300 400 500 600 700 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 i q(off) - off supply current (na) v in - input voltage (v) sip32459 0 100 200 300 400 500 600 700 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 i ds(off) - off switch current (na) v in - input voltage (v) 16 18 20 22 24 26 28 30 32 34 36 38 40 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 r ds - on-resistance (m) v in - input voltage (v) i o = 2.0 a i o = 3.0 a i o = 0.5 a i o = 1.0 a i o = 0.1 a figure 11 - off supply current vs. temperature figure 12 - off switch current vs. temperature figure 13 - r ds(on) vs. temperature 0.01 0.1 1 10 100 1000 10000 - 40 - 20 0 20 40 60 80 100 i iq(off) - off supply current (na) temperature ( c) v in = 1.2 v v in = 3.6 v v in = 5.5 v v in = 4.5 v v in = 2.5 v sip32459 0.01 0.1 1 10 100 1000 10000 - 40 - 20 0 20 40 60 80 100 i ds(off) - off switch current (na) temperature ( c) v in = 5.5 v v in = 3.6 v v in = 1.2 v v in = 2.5 v v in = 4.5 v 15 16 17 18 19 20 21 22 23 24 25 - 40 - 20 0 20 40 60 80 100 r ds - on-resistance (m) temperature ( c) i o = 0.5 a v in = 4.5 v
www.vishay.com 6 document number: 63999 s12-2709-rev. a, 12-nov-12 vishay siliconix SIP32458, sip32459 this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 for technical questions, contact: powerictechsupport@vishay.com typical characteristics (internally regulated, 25 c, unless otherwise noted) figure 14 - reverse blocking current vs. output voltage figure 15 - reverse blocking current vs. temperature figure 16 - output pulldown resistance vs. temperature - 140 - 120 - 100 - 80 - 60 - 40 - 20 0 0.5 1.0 1.5 2.0 2.5 3. 0 3.5 4.0 4.5 5.0 5.5 i in - input current (na) v out - output voltage (v) v in = 0.75v SIP32458 -300 -250 -200 -150 -100 -50 0 50 - 40 - 20 0 20 40 60 80 100 i in - input current (na) temperature ( c) v out = 2.5 a v in = 0.75 v SIP32458 55 60 65 70 75 80 85 - 40 - 20 0 20 40 60 80 100 r pd - output pulldown resistance () temperature ( c) v in = 3.3 v i out = 5 ma sip32459 figure 17 - en threshold voltage s. input voltage figure 18 - turn-on delay time s. temperature figure 19 - rise time s. temperature 0.4 0.45 0.5 0.55 0.6 0.65 0.7 0.75 0.8 0.85 0.9 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 en threshold voltage (v) v in - input voltage(v) v ih v il 0 0.2 0.4 0.6 0.8 1 - 40 - 20 0 20 40 60 80 100 t d(on) - turn-on delay time (ms) temperature ( c) v in = 4.5 v c l = 100 f r l = 5 c) v in = 4.5 v c l = 100 f r l = 5
SIP32458, sip32459 vishay siliconix document number: 63999 s12-2709-rev. a, 12-nov-12 www.vishay.com 7 this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 for technical questions, contact: powerictechsupport@vishay.com typical characteristics (internally regulated, 25 c, unless otherwise noted) typical waveforms figure 20 - turn-off delay time vs. temperature 10.00 12.00 14.00 16.00 18.00 20.00 22.00 24.00 - 40 - 20 0 20 40 60 80 100 t d(off) - turn-off delay time (s) temperature ( c) v in = 4.5 v c l = 100 f r l = 5 figure 21 - turn-off delay time s. temperature 0.00 0.20 0.40 0.60 0.80 1.00 1.20 1.40 1.60 1.80 2.00 - 40 - 20 0 20 40 60 80 100 t d(off) - turn-off delay time (ms) temperature ( c) v in = 4.5 v c l = 100 f r l = 150 SIP32458 sip32459 figure 22 - turn-on time (v in = 4.5 v, r l = 5 ? , c l = 100 f) figure 23 - turn-off time (v in = 4.5 v, r l = 5 ? , c l = 100 f) figure 24 - turn-on time (v in = 4.5 v, r l = 150 ? , c l = 100 f) figure 25 - turn-off time, SIP32458 (v in = 4.5 v, r l = 150 ? , c l = 100 f)
www.vishay.com 8 document number: 63999 s12-2709-rev. a, 12-nov-12 vishay siliconix SIP32458, sip32459 this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 for technical questions, contact: powerictechsupport@vishay.com detailed description SIP32458 and sip32459 are p-channel power mosfet designed as high side load switches. they incorporate a negative charge pump at the gate to keep the gate to source voltage high when turned on therefore keep the on resistance low at lower input voltage range. SIP32458 and sip32459 are designed with slow slew rate to minimize the inrush current during turn on. the SIP32458 has a reverse blocking circuit to prevent the current from going back to the input in case the output voltage is higher than the input voltage. the sip32459 has an output pulldown resistor to discharge the output capacitance when the device is off. application information input capacitor while a bypass capacitor on the input is not required, a 4.7 f or larger capacitor for c in is recommended in almost all applications. the bypass capacitor should be placed as physically close as possible to the input pin to be effective in minimizing transients on the input. ceramic capacitors are recommended over tantalum because of their ability to withstand input current surges from low impedance sources such as batteries in portable devices. output capacitor a 0.1 f capacitor across v out and gnd is recommended to insure proper slew operation. there is inrush current through the output mosfet a nd the magnitude of the inrush current depends on the output capacitor, the bigger the c out the higher the inrush current. there are no esr or capacitor type requirement. enable the en pin is compatible with cmos logic voltage levels. it requires at least 0.4 v or below to fully shut down the device and 1 v or above to fully turn on the device. there is a 2.8 m ? resistor connected between en pin and gnd pin. protection against reverse voltage condition the SIP32458 contains the reverse blocking circuit to keep the output current from flowing back to the input in case the output voltage is higher than the input voltage. thermal considerations these devices are designed to maintain a constant output load current. due to physical limitations of the layout and assembly of the device the maxi mum switch current is 3 a as stated in the absolute maxi mum ratings table. however, another limiting characteristic for the safe operating load current is the thermal power dissipation of the package. to obtain the highest power dissipation (and a thermal resistance of 110 c/w) the device should be connected to a heat sink on the printed circuit board. the maximum power dissipation in any application is dependant on the maximum junction temperature, t j(max.) = 125 c, the junction-to- ambient thermal resistance, ? j-a = 110 c/w, and the ambient temperature, t a , which may be formulaically expressed as: it then follows that, assuming an ambient temperature of 70 c, the maximum power dissipation will be limited to about 500 mw. so long as the load current is below the 3 a limit, the maximum continuous switch current beco mes a function two things: the package power dissipation and the r ds(on) at the ambient temperature. as an example let us calculate the worst case maximum load current at t a = 70 c. the worst case r ds(on) at 25 c is 36 m ? at v in = 1.5 v. the r ds(on) at 70 c can be extrapolated from this data using the following formula: r ds(on) (at 70 c) = r ds(on) (at 25 c) x (1 + t c x ? t) where t c is 2820 ppm/c. continuing with the calculation we have r ds(on) (at 70 c) = 36 m ? x (1 + 0.00282 x (70 c - 25 c)) = 40.5 m ? the maximum current limit is then determined by which in this case is 3.5 a. under the stated input voltage condition, if the 3.5 a current limit is exceeded the internal die temperature will rise and eventually, possibly damage the device. to avoid possible permanent damage to the device and keep a reasonable design margin, it is recommended to operate the device maximum up to 3 a only as listed in the absolute maximum ratings table. figure 26 - turn-off time, sip32459 (v in = 4.5 v, r l = 150 ? , c l = 100 f) 110 125 (max.) (max.) a a j a j t t t p - = - = - ) ( (max.) (max.) o n ds load r p i <
SIP32458, sip32459 vishay siliconix document number: 63999 s12-2709-rev. a, 12-nov-12 www.vishay.com 9 this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 for technical questions, contact: powerictechsupport@vishay.com package outline wcsp: 6 bumps (2 x 3, 0.5 mm pitch, 250 m bump height, 1 mm x 1.5 mm die size) vishay siliconix maintains worldwide manufacturing capability. pr oducts may be manufactured at one of several qualified locatio ns. reliability data for silicon technology and package reliability represent a composite of all qualified locations. for related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?63999 dimension millimeters inches min. nom. max. min. nom. max. a 0.540 0.580 0.620 0.0212 0.0228 0.0244 a1 0.225 0.250 0.275 0.0088 0.0098 0.0108 b 0.280 0.300 0.320 0.0110 0.0118 0.0126 e 0.500 0.0197 s 0.230 0.250 0.270 0.0090 0.0098 0.0106 d 0.920 0.960 1.000 0.0362 0.0378 0.0394 e 1.420 1.460 1.500 0.0559 0.0575 0.0591
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